Develops a universal RISC-V microprocessor based on a coarse-grained reconfigurable architecture that unifies CPU, DSP, GPU and FPGA paradigms in a single, workload-agnostic chip.
Develops a universal RISC-V microprocessor based on a coarse-grained reconfigurable architecture that unifies CPU, DSP, GPU and FPGA paradigms in a single, workload-agnostic chip.